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An approach to the numerical solution of one-dimensional heat equation on SoC FPGA


 
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1. Título Título del documento An approach to the numerical solution of one-dimensional heat equation on SoC FPGA
 
2. Creador/a Nombre de autor/a, institución, país Luís Castano; Instituto Tecnológico Metropolitano, Medellín, Colombia; Colombia
 
2. Creador/a Nombre de autor/a, institución, país Gustavo Osorio; Universidad Nacional de Colombia, Manizales, Colombia; Colombia
 
3. Materia Disciplina(s)
 
3. Materia Palabra/s clave FPGA, stencil computation, heat equation, finite differences
 
4. Descripción Resumen A common kernel used in scientific computing is the stencil computation. FPGA based heterogeneous systems has been used to overcome stencil algorithm performance limitations due to the memory bandwidth on CPU and GPU based systems. Performance improvement is achieved through the combination of several data flow optimization techniques, taking advantage of the FPGA inherent parallelism. However, array architectures used for some two-dimensional problems involves the need of considerable number of FPGAs, for mesh sizes that can be treated by a CPU or GPU based system with a suitable performance at a lower cost. With the development of high level synthesis tools, the implementation of algorithms over FPGA is performed with a better design flow than traditional logic design. In this case, optimization techniques are performed at software level. In this document is presented a system designed to evaluate the performance of a stencil computation algorithm over a SoC FPGA at hardware level. The data-path is designed to perform the stencil computation algorithm using a one-dimensional array of processing elements and registers. System performance is evaluated for the approach to the numerical solution of a heat transfer problem modeled with the heat equation for the one-dimensional case. The proposed architectures are implemented in a ZedBoard Zynq Evaluation and Development Kit using Vivado Design Suite and Xilinx SDK
 
5. Editorial Institución organizadora, ubicación Universidad Tecnológica de La Habana José Antonio Echeverría
 
6. Colaborador/a Patrocinador(es)
 
7. Fecha (DD-MM-AAAA) 2019-02-15
 
8. Tipo Estado y género Artículo revisado por pares
 
8. Tipo Tipo
 
9. Formato Formato de archivo PDF, PDF
 
10. Identificador Identificador uniforme de recursos http://rielac.cujae.edu.cu/index.php/rieac/article/view/517
 
11. Fuente Título; vol., núm. (año) Revista Ingeniería Electrónica, Automática y Comunicaciones ISSN: 1815-5928; Vol. 38, Núm. 2 (2017)
 
12. Idioma Español=es en
 
13. Relación Archivos complementarios
 
14. Cobertura Localización geoespacial, periodo cronológico, muestra de investigación (sexo, edad, etc.)
 
15. Derechos Derechos de autor/a y permisos Copyright (c)